Holds control data for the Floating-point extension
| LSPACT | Indicates whether lazy preservation of the floating-point state is active |
| USER | Indicates the privilege level of the software executing when the PE allocated the floating-point stack frame |
| S | Security status of the floating-point context. This bit is only present in the Secure version of the register, and behaves as RAZ/WI when accessed from the Non-secure state. This bit is updated whenever lazy state preservation is activated, or when a floating-point instruction is executed |
| THREAD | Indicates the PE mode when it allocated the floating-point stack frame |
| HFRDY | Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the HardFault exception to pending |
| MMRDY | Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the MemManage exception to pending |
| BFRDY | Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the BusFault exception to pending |
| SFRDY | Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the SecureFault exception to pending. This bit is only present in the Secure version of the register, and behaves as RAZ/WI when accessed from the Non-secure state |
| MONRDY | Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the DebugMonitor exception to pending |
| SPLIMVIOL | This bit is banked between the Security states and indicates whether the floating-point context violates the stack pointer limit that was active when lazy state preservation was activated. SPLIMVIOL modifies the lazy floating-point state preservation behavior |
| UFRDY | Indicates whether the software executing when the PE allocated the floating-point stack frame was able to set the UsageFault exception to pending |
| TS | Treat floating-point registers as Secure enable |
| CLRONRETS | This bit controls whether the CLRONRET bit is writeable from the Non-secure state |
| CLRONRET | Clear floating-point caller saved registers on exception return |
| LSPENS | This bit controls whether the LSPEN bit is writeable from the Non-secure state |
| LSPEN | Enables lazy context save of floating-point state |
| ASPEN | When this bit is set to 1, execution of a floating-point instruction sets the CONTROL.FPCA bit to 1 |